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“Design of Smart Pixel Interfaces for Optical Page-Oriented Memories”
by Wei-Feng Hsu
May 1996
Novel digital information services such as multimedia and video-on-demand require the storage of a large amount data at very low bit-error rate (BER), fast access to this data, and the efficient interface of the storage system to high speed (gigabit/second) networks. Optical page-oriented memory (OPOM) technology is one candidate that simultaneously provides large capacity and high data access rates. In this thesis, several designs for smart pixel (SP) interfaces for optical page-oriented memories are studied. Because of their potentially high capacity and large aggregate data transfer rate, the output of OPOMs must be directly interfaced to high-speed networks. However, the high raw BER of OPOMs severely limits some applications.We concentrate on error correction coding/decoding and interface design using smart pixel technology. The interface contains an array of SP Reed-Solomon (RS) decoders that reduce the BER to 10-12 or better. The RS decoder, implementing the transfer decoding algorithm (TDA), has a pipeline structure and provides a high decoding rate. The TDA is implemented by 1-D and 2-D pipeline structures and serial and parallel finite field multipliers, resulting in six variations of the TDA RS decoder. A modified VLSI circuit simulation model was employed to estimate decoder area, power dissipation, and the maximum clock frequency.
The system analysis in this thesis was performed under two different sets of objectives. The first objective is to define system parameters for the RS coder and decoder which provide the highest aggregate output rate (throughput) of corrected information bits. The second objective is to define system parameters and the RS coder and decoder design which provide the highest code rate (defined as the fraction of total bits that are useful information) and, in turn, achieve the largest usable capacity. The results of these two analyses are that the codeword length of the chosen RS codes tends to approach two extremes: achieving either high data throughput (shorter length codes); or high capacity (longer length codes). Finally, several methods, including advanced optoelectronic packaging and multi-dimensional array codes, are proposed to improve future system performance.